1. Field
Example embodiments relate to a semiconductor package, a method of manufacturing the semiconductor package, and method of using the semiconductor package.
2. Description of the Related Art
The electronics market is currently growing in the area of mobile electronics products. Electronic components, for example, semiconductor devices, that may be installed in mobile electronics products should be lighter and smaller-sized. Accordingly, semiconductor devices have been developed that may be reduced in size; that may include several individual semiconductor devices in one semiconductor chip, which is called a system on chip (SOC); and/or that may include a plurality of semiconductor chips packaged in one semiconductor package, which is called a system in package (SIP).
According to SIP technology, a plurality of semiconductor chips is mounted on a lead frame or a substrate. The semiconductor chips are mounted horizontally or vertically with respect to a semiconductor package. SIP technology shares a similar concept with conventional multi-chip module (MCM) technology. The difference is that whereas conventional MCM technology includes mounting semiconductor chips in a horizontal direction, SIP technology includes forming a semiconductor stack package in which semiconductor chips are stacked vertically.
Meanwhile, if a semiconductor stack package is formed using conventional semiconductor chips, the positions of the pads in the semiconductor chips will be the same regardless of the type of semiconductor stack package. Thus, a number of wiring layers in a wiring substrate, for example, in a PCB, is increased. In order to reduce the number of wiring layers in the PCB, an interposer chip may be stacked between the semiconductor chips.
However, a conventional interposer chip includes only an input/output (I/O) bonding pad for connecting upper and lower semiconductor chips. Thus, if the bonding pad of the interposer chip is wire-bonded, for example, with gold, it may not be detected whether the wire-bonding was successful.
For example, non-stick defects may occur in which a wire is not properly bonded to a bonding pad of an interposer chip. If a non-stick defect occurs, it will be determined that all of the semiconductor chips are defective, rather than the discovering the defective wire-bond. Accordingly, the yield of the semiconductor stack package will be decreased. Also, if wire-bonding defects in the bonding pad of the interposer chip are not detected, the semiconductor stack package may proceed to a subsequent process, thus increasing the burden in performing further testing, which in turn may increase the cost.